Fast, Accurate Signaling Analysis for Nonlinear High-Speed Channels: Eye Diagrams, Bit-Error Rates, and Jitter Effects

Speaker:
Dr. Olena (Jianfang) Zhu, Intel, Head of AI Solutions & Ecosystem, Client Computing Group

Chapter:
Santa Clara Valley

Abstract:
Fast, Accurate Signaling Analysis for Nonlinear High-Speed Channels: Eye Diagrams, Bit-Error Rates, and Jitter Effects

5:30 pm (PST) Social/Light Dinner Served
6:15: Chapter and Presentation begins

Come join us for the latest update on how to deliver an accurate solution for Nonlinear High-Speed Channels using AI:
– Efficient Eye-Diagram Prediction via Low-Rank Approximations
– Fast BER Analysis for Nonlinear Systems
-Signaling Analysis Including Jitter Effects

These combined techniques enable practical, rigorous SI/PI/jitter analysis for next-generation high-rate I/Os (e.g. DDR, SerDes, DRAM, interposer links), where budgets are tight and nonlinearity + jitter can no longer be treated as small perturbations. Future work may extend in several directions: multi-channel interactions (more aggressors / crosstalk), adaptive equalization, dynamic jitter/noise sources, and real-time / in-design tools embedding these fast approximations.