Publisher: Springer, 2006
Most often we deal with EMC issues at the system, subsystem, and
box level. Sometimes EMC engineers address EMC issues at the board
level. This book brings a description and addresses EMC issues
down to the chip level. Therefore, this book addresses mostly
EMC at the integrated circuit level, as its title indicates.
I found the book very informative. For those interested in EMC
issues at the integrated circuit level, this book will be a good
start. I think this book is also of interest and a good reference
to chip designers and board designers, of which I consider myself
One important factor that needs to come across is that the reader
of this book must already have some good knowledge of EMC, but
that seems to be understandable in my opinion because I would
expect most of the readers of this book to be engineering professionals
who have either experienced or learned about EMC in their daily
The book is composed of seven Chapters and two appendices totaling
about 450 pages. It comes with a CD containing some of the tools
used in the book. I counted 37 contributors to this book, which
indicates it averages about 12 pages per contributor. There is
an indication of which contributors participated in which Chapters.
Contributors are mostly from Europe, but there are contributors
from the US, Japan, and Morocco also.
The first Chapter of the book, titled Basic Concepts in EMC for
ICs provides an introduction to the EMC issues that can play a
role in integrated circuits. It covers briefly some of the different
types of coupling mechanisms commonly seen in EMC and provides
also an introduction of EMC measurements that are suitable mainly
for integrated circuits. Chapter 2, titled Historical Review and
State of the Art, provides a very detailed history of the work
done from the early 1970’s on the subject of EMC for integrated
circuits. This is followed by some of the state of the art issues
in IC design that have EMC implications. There is a good listing
of references at the end of the Chapter. Chapter 3 is titled Fundamentals
and Theory and it is somewhat a combination of an introduction
to antenna theory and an introduction to transmission line theory.
I think Chapter 3 could have benefited by the addition of some
of the most salient EMC concepts, like parasitic effects of components,
differential and common mode currents, crosstalk, and field coupling.
The bulk of the book is concentrated on its two longest Chapters
(Chapters 4 and 5), which address measurements and modeling of
EMC in integrated circuits, respectively. Chapter 4 is titled
Measurement Methods for emissions and susceptibility of integrated
circuits. The Chapter addresses the measurements techniques that
can be used for characterizing the emissions from parasitic effects
and the immunity levels of integrated circuits. The measurements
methodologies are based on the international standard IEC 61967
for emissions and the IEC 62132 standard for susceptibility. In
the area of emissions, the Chapter covers in very good detail
the usage of TEM/GTEM test chambers, the near field scan, the
Workbench Faraday Cage for radiated emissions, and the 1/150 ohm
conducted methods for conducted emissions; all of which are standard
methodologies outlined in IEC 61967 and are tailored in this Chapter
for IC EMC emissions measurements. These are all near field techniques
for measuring emissions from analog and digital integrated circuits.
The drawback of these techniques is the time required to complete
each scan at each given frequency. There is an emphasis on the
need to design better probes for measuring strong regions of magnetic
fields above the surface of IC packages. In the area of susceptibility
or immunity testing, the Chapter covers, in very good detail,
the methods of Bulk Current Injection and Direct Power Injection.
The authors seem to prefer direct power injection for ICs (though
they are more time consuming and costly). The Chapter ends with
a good description of proposed impulse immunity methods for ICs
(to be part of IEC 62215). There is also a discussion in the Chapter
of the usage of anechoic chambers for far field emissions measurements.
The Chapter describes the basic ideas beyond far field emissions;
possible set up for emission/immunity measurements in anechoic
chambers and reverberation chambers. The Chapter ends with a discussion
of on-chip measurements approaches for noise characterization
of integrated circuits.
Chapter 5 is all about modeling and it is obviously titled EMC
Modeling: An Overview of Emission and Immunity Phenomena Modeling
in ICs. This is the longest Chapter in the book. The Chapter deals
with modeling the parasitic effects as it relates to EMC in integrated
circuits. The Chapter starts with modeling of ESD (human body
model, machine model, charge device model, and transmission line
pulse model). These models were developed to produce most of the
different failure signatures of integrated circuits, which are
caused by ESD stress. Then Chapter 5 moves on to model the parasitic
and distributive electrical model parameters of PCB transmission
lines and packaging for ICs. Once this is done, the Chapter continues
with modeling emission and then susceptibility of integrated circuits.
In modeling the emissions from integrated circuits, the Chapter
makes use of a model developed by the French Standardization Group,
known as the IC EMC model (or ICEM). The Chapter goes on to describe
the details of this model, how it works, how it can be used, and
some of the results of the models when compared to measurements.
ICEM can address both radiated and conducted emissions. Some ICEM
applications were also described. Besides the ICEM model, the
Chapter also addresses in good detail the usage of IBIS (a standardized
format for modeling analog of digital i/o buffers) for modeling
signal integrity. Because IBIS hides proprietary device and internal
connectivity detail, most semiconductors and EDA tool vendors
support it. Another model discussed in the Chapter is the IMIC
model (I/O interface model for integrated circuit per the standard
EIAJ ED-5302). Simulations of signal integrity, power integrity
and conducted emissions are possible using IMIC. Another emissions
model developed in Japan is discussed in this Chapter, the Linear
Equivalent Circuit and Current Source (LECCS). LECCS is a model
based on macro-model for digital IS/LSIs and it was originally
developed to evaluate the RF noise current on a power pin of a
core logic circuit.
In modeling immunity, the authors used modified versions of the
ICEM and LECCS models. A new and important issue in immunity models
is the establishment of fail criteria, and Chapter 5 addresses
several cases of such. Chapter 5 ends with a brief discussion
of crosstalk effects (propagation delays and increased power consumption).
This is probably more of an issue when victim lines and aggressor
lines switch simultaneously which can cause changes in the propagation
delays of the victim and the interconnecting lines must also be
long with respect to frequency.
Chapter 6 is titled Case Studies: EMC Test-chips, Low Emission
Microcontrollers. No new material is presented in this Chapter
from the point of view of EMC in integrated electronics. The Chapter
presents a collection of case studies dealing with the electromagnetic
compatibility of integrated circuits, and the emphasis is on microcontrollers.
Emission and susceptibility of microcontrollers from several IC
manufacturers are measured using standard methods (Chapter 4)
and predicted results are obtained from models using a macro-modeling
approach (Chapter 5). Specific test chips dedicated to the characterization
of internal switching noise and to the validation of low emission
design techniques are also described.
The last Chapter of the book, Chapter 7, is titled Guidelines:
Rules to Improve EMC. It describes a series of design methodologies
to significantly reduce the parasitic emissions and susceptibility
of CMOS integrated circuits. Both layout and packaging guidelines
are addressed. EMC